A computer module of a computer system may transmit data to another computer module of the computer system via a high speed bus lane. The computer system may include repair logic configured to detect and repair defects of the high speed bus lane. The repair logic may use stuck-at faults (e.g., stuck-at 1, stuck-at 0) to test whether an error exists in a bus lane. However, in modern high speed buses, a bus lane may be considered non-defective when an associated bit error rate is below a threshold (e.g., one bit error in every trillion bits).